Formal Hardware Model

State: Ongoing

Reto Achermann, Lukas Humbel, David Cock, Timothy Roscoe

The hardware/software boundary in modern heterogeneous multicore computers is increasingly complex, and diverse across different platforms. A single memory access by a core or DMA engine traverses multiple hardware translation and caching steps, and the destination memory cell or register often appears at different physical addresses for different cores. Interrupts pass through a complex topology of interrupt controllers and remappers before delivery to one or more cores, each with specific constraints on their configurations. System software must not only correctly understand the specific hardware at hand, but also configure it appropriately at runtime.

[ Code on Github ]


State: Completed

Stefan Kaestle, Reto Achermann, Roni Haecki, Moritz Hoffmann, Sabela Ramos and Timothy Roscoe, ETH Zurich

The performance of tree-based group communication primitives such as broadcasts and reductions highly depend on the tree topology and and message send order. Furthermore, there is no single topology which works well across a wide variety of machines. In this project, we present Smelt a framework that contstructs good trees for any machine.

[ Code ] [ Results ]


State: Completed

Stefan Kaestle, Reto Achermann, Timothy Roscoe, ETH Zurich; Tim Harris, Oracle Labs Cambridge. February 2014.

Modern machines feature highly complex memory hiearchies and NUMA topologies which makes it hard for programmers to allocate and manipulate memory. We present Shoal, a runtime library for smart memory allocation based on data access patterns and hardware characteristics.

[ Read More ]

Distributed Systems Lab

State: Completed

Reto Achermann, Antoine Kaufmann. Bulk Transfer over Network. Distributed Systems Lab, ETH Zurich, February 2014. [ .pdf ]

Efficient bulk transfer of data within a machine (shared memory) and between machines over network is is crucial for the performance of distributed systems. During this project, we investigated a unified design for bulk transfer over shared memory and network in collaboration with Jeremia Baer and Claudio Foellmi.


Reto Achermann

acreto [at]

+41 44 633 70 15

Dept. of Computer Science
CAB E 69, ETH Zürich
Universitätstrasse 6
8092 Zürich