Reto Achermann

Assistant Professor
Systems Research Group
TUM School of Computation, Information and Technology

Cache-Coherent Accelerators for Persistent Memory Crash Consistency

Authors

Ankit Bhardwaj, Todd Thornley, Vinita Pawar, Reto Achermann, Gerd Zellweger and Ryan Stutsman

Venue

Proceedings of the 14th ACM Workshop on Hot Topics in Storage and File Systems (HotStorage'22)

Links

[ .doi ] [ .pdf ] [ .bib ]

Abstract

Building persistent memory (PM) data structures is difficult because crashes interrupt operations, leaving data structures in an inconsistent state. Solving this requires augmenting code that modifies PM state to ensure that interrupted operations can be completed or undone. Today, this is done using careful, hand-crafted code, a compiler pass, or page faults. We propose a new, easy way to transform volatile data structure code to work with PM that uses a cache-coherent accelerator to do this augmentation, and we show that it may outperform existing approaches for building PM structures.

Bibtex

@inproceedings{Bhardwaj:2022:CCA,
 author = {Bhardwaj, Ankit and Thornley, Todd and Pawar, Vinita and Achermann, Reto and Zellweger, Gerd and Stutsman, Ryan},
 booktitle = {Proceedings of the 14th ACM Workshop on Hot Topics in Storage and File Systems},
 doi = {10.1145/3538643.3539752},
 id = {Bhardwaj:2022:CCA},
 isbn = {9781450393997},
 location = {Virtual Event},
 pages = {37–44},
 publisher = {Association for Computing Machinery},
 series = {HotStorage'22},
 title = {Cache-Coherent Accelerators for Persistent Memory Crash Consistency},
 url = {https://doi.org/10.1145/3538643.3539752},
 year = {2022}
}

Contact

Prof. Reto Achermann
I01: Chair of Distributed Systems and Operating Systems (aka Systems Research Group)
1st Floor, 7th Finger
School of Computation, Information, and Technology (CIT)
Technical University of Munich (TUM)
Boltzmannstr. 3
85748 Garching bei München
Germany

firstname.lastname [at] cit.tum.de